Fault-Tolerant Universal Circuits on Logical Qubits: Non-Clifford Gate fidelity at the limits of classical simulability
Science/CS domains
Quantum Error Correction (QEC), Universal Fault-Tolerant Computing, High-Performance Quantum Circuit Simulation
Project description
Achieving fault-tolerant universal quantum computation requires non-Clifford resources —T gates and Toffoli gates implemented via magic state distillation and gate teleportation.
Simulating these circuits is itself a fundamental computational challenge: Non-Clifford evolution cannot be compressed into efficient classical representations, and scaling logical qubit circuits to meaningful code distances is very computationally intensive.
This project characterizes non-Clifford logical fidelity while pushing the boundaries of classical simulability using modern HPC tools.
Project tasks
The intern will employ a hierarchy of simulation tools matched to circuit size.
Qiskit Aer’s density matrix simulator serves as the baseline for small systems and validation. NVIDIA CUDA-Q with multi-GPU backends scales simulations to larger qubit counts, exploiting GPU parallelism to extend accessible system size.
Monte Carlo sampling across realistic noise models (depolarizing, amplitude damping, coherent errors) will estimate logical error rates across varying noise parameters and system sizes, mapping fidelity thresholds and the classical simulability boundary.
The intern role includes the following:
- Implement and validate logical encodings: Build CSS code logical qubit encodings in Qiskit Aer as a reference baseline, establishing fault-tolerant control structures under realistic noise models.
- Scale using GPU-accelerated simulation: Migrate validated circuits to CUDA-Q with multi-GPU backends, systematically increasing code distance and qubit count to identify the practical boundary of classical simulability for universal logical circuits.
- Implement non-Clifford gate protocols: Design and implement gate teleportation protocols for logical T and Toffoli gates consuming mid-circuit magic states, evaluating fidelity degradation under noise as a function of system size and circuit depth.
Desired skills/background
- Strong foundation in QEC (stabilizers, CSS codes, magic state distillation).
- Python proficiency; Qiskit and/or CUDA-Q experience preferred.
- Familiarity with density matrix simulation, noise modeling, and GPU/HPC computing.
- Experience utilizing AI reasoning engines (ChatGPT, Gemini) and AI-augmented IDEs (Cursor).
- Graduate-level QEC or quantum computing coursework preferred.
Apply to join this project
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Project mentor
Jan Balewski
Staff Data Scientist
National Energy Research Scientific Computing Center (NERSC)
Science Engagement & Workflows Dept.
Data Science Engagement Group