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Featured Announcements

Upgrades to Facility Will Require Multi-Day Outage in Early 2017

December 5, 2016 by Rebecca Hartman-Baker

There are upgrades to the electrical and plumbing systems in the NERSC machine room that must be performed in the new year. The electrical upgrade will increase the reliability of the electrical system that feeds power to the machines, and the plumbing system upgrade will increase the capacity of the water cooling system that keeps the supercomputers cool.

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A Brief Primer on the SLURM Scheduler

October 17, 2016 by Rebecca Hartman-Baker

Edison is the only NERSC supercomputer currently available to users, so it is unusually oversubscribed. This has led to long wait times for many users, and a number of questions to NERSC consulting about the poor throughput many users are getting. Users often wonder whether the scheduler is working properly.

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Science Gateways Moving to Berkeley Hardware: Test Your Site!

October 7, 2016 by Annette Greiner

We are in the final phases of moving NERSC science gateway infrastructure from the Oakland Scientific Facility (OSF) to the Computational Research and Theory building (Wang Hall) at the LBNL campus. We are using this opportunity to migrate science gateway applications to new hardware. This move will enable us to more easily maintain the gateway infrastructure and will help ensure smooth growth of our gateway services going forward.

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Call for Proposals: NESAP for Data

September 27, 2016 by Rollin Thomas

NERSC is now accepting applications for participation in the NERSC Exascale Science Applications Program (NESAP) from developers of data-intensive science applications (NESAP for Data). NESAP is a highly successful collaborative effort where NERSC partners with code teams and library and tool developers to prepare for the NERSC-8 Cori manycore architecture. A key feature of the Cori system is the Intel Xeon Phi “Knights Landing” (KNL) processor that has 68 cores per node and supports up to four hardware threads on each core, and will also include 16 GB of high-bandwidth, on-package memory. The program will partner application teams with resources at NERSC, Cray, and Intel, and will last beyond final acceptance of the Cori system.

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Cori Phase I and II Integration Begins 9/19/2016

September 9, 2016 by Rebecca Hartman-Baker

The integration of Cori Phase I and Phase II is scheduled to begin on Monday, September 19, 2016. This integration requires an outage of Cori Phase I for up to six (6) weeks.

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