NERSCPowering Scientific Discovery Since 1974

Energy Aware Computing

Dynamic Frequency Scaling

One means to lower the energy required to compute is to reduce the power usage on a node. One way to accomplish this is by lowering the frequency at which the CPU operates. However, reducing the clock speed increases the time to solution, creating a potential tradeoff. NERSC continues to examine how such methods impact its operations and its workload. 

Read a related paper: "Measurement and interpretation of micro benchmark and application energy use on the Cray XC30," by Brian Austin and Nicholas J. Wright