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NERSC Presents First Intel Xeon Phi KNL Performance Results

June 23, 2016 by Richard Gerber

NERSC staff presented the first results of running applications on the Intel Xeon Phi KNL architecture. KNL will form the basis of NERSC's new Cori supercomputer, which will have 9,300 KNL nodes in a Cray XC40 system. Cori KNL hardware will arrive at NERSC this summer.

Workshop IXPUG ISC 1 sm


The results were presented at a Xeon Phi performance workshop held by the IXPUG users group at ISC16 in Frankfurt, Germany.

Applying the Roofline Performance Model to the Intel Xeon Phi Knights Landing ProcessorD. Doerfler, J. Deslippe, S. Williams, L. Oliker, B. Cook, Th. Kurth, M. Lobet, T. Malas, J.-L. Vay and H. Vincenti (NERSC)

Optimizing Excited-State Electronic-Structure Codes for Intel Knights Landing: a Case Study on the BerkeleyGW SoftwareJ. Deslippe, F. H. Da Jornada, D. Vigil-Fowler, K. Raman, R. Sasanka, St. G. Louie, N. Wichmann and T. Barnes (NERSC/UCB/Intel/Cray/NREL/LBNL)

Optimizing Dirac Wilson Operator and linear solvers for Intel KNLTh. Kurth, D. Kalamkar, B. Joo and K. Vaidyanathan (NERSC/LBNL/JLAB/Intel)

High performance optimizations for nuclear physics code MFDn on KNLB. Cook, P. Maris, M. Shao, N. Wichmann, M. Wagner, J. O’neill, T. Phung and G. Bansal (NERSC/ISU/LBNL/Cray/Intel)

Optimizing SpMV and IDR Krylov solver in EMGeo for Intel KNLT. Malas, T. Kurth, J. Deslippe

Porting the MIMD Lattice Computation (MILC) Code to the Intel Xeon Phi Knights Landing ProcessorRuizi Li, Dhiraj Kalamkar, Ashish Jha, Steven Gottlieb, Carleton DeTar, Doug Toussaint4, Balint Joo, and Douglas Doerfler