Muhammad Haseeb

Muhammad Haseeb is an N4S postdoc with the Application Performance Group at NERSC. His research interests span HPC, modern C++, programming models and technologies, GPU-computing, performance optimization and software engineering. Haseeb is currently working on studying and optimizing GPU-GPU communications across Perlmutter interconnects (NVLink, PCIe and Slingshot11). He is also working on powering NERSC scientific codes with C++26, nvstdexec, stdpar, hpx, CUDA, SYCL, pybind11 and more technologies. He is also actively involved in optimizing WarpX (AMReX) kernels for performance and load-balance as well as studying, deploying, and enabling (new) experimental programming models and compilers on Perlmutter.

Haseeb received his PhD in Computer Science from the Florida International University in Miami, Florida. His doctoral research focused on developing HPC and GPU-accelerated algorithms for scalable acceleration of peptide identification algorithms. Haseeb also worked as an intern at NERSC during the summers of 2020 and 2021 where he respectively contributed to the development of HPC instrumentation via timemory and dyninst, and SYCL-ification and roofline analysis of ADEPT (ExaBiome) algorithms.

Prior to his graduate career, Haseeb was an Embedded Software Engineer (L2) at Mentor Graphics Corporation (now Siemens-EDA) where he contributed to the development of system partitioning, asymmetric multiprocessing framework (uAMP), Nucleus RTOS kernel, uAMP tracing, and low-level (ARM SoC) driver development in an agile environment.