Index

• .align pseudo-op
• .bb pseudo-op
• .bc pseudo-op
• .bf pseudo-op
• .bi pseudo-op
• .bs pseudo-op
• .byte pseudo-op
• .comm pseudo-op
• .csect pseudo-op
• .double pseudo-op
• .drop pseudo-op
• .dsect pseudo-op
• .eb pseudo-op
• .ec pseudo-op
• .ef pseudo-op
• .ei pseudo-op
• .es pseudo-op
• .extern pseudo-op
• .file pseudo-op
• .float pseudo-op
• .function pseudo-op
• .globl pseudo-op
• .hash pseudo-op
• .lcomm pseudo-op
• .lglobl pseudo-op
• .line pseudo-op
• .llong pseudo-op
• .long pseudo-op
• .machine pseudo-op
• .org pseudo-op
• .quad pseudo-op
• .rename pseudo-op
• .set pseudo-op
• .short pseudo-op
• .source pseudo-op
• .space pseudo-op
• .stabx pseudo-op
• .string pseudo-op
• .tbtag pseudo-op
• .tc pseudo-op
• .toc pseudo-op
• .tocof pseudo-op
• .using pseudo-op
• .vbyte pseudo-op
• .weak pseudo-op
• .xline pseudo-op

• 32-bit applications
  • POWER family
  • PowerPC
• 32-bit fixed-point rotate and shift instructions
  • extended mnemonics
• 64-bit fixed-point rotate and shift instructions
  • extended mnemonics

• a (Add) instruction
• abs (Absolute) instruction
• accessing data through the TOC
• add (Add) instruction
• addc (Add Carrying) instruction
• adde (Add Extended) instruction
• addi (Add Immediate) instruction
• addic. (Add Immediate Carrying and Record) instruction
• addic (Add Immediate Carrying) instruction
• addis (Add Immediate Shifted) instruction
• addme (Add to Minus One Extended) instruction
• address location
  • making a translation look-aside buffer for
    • using tlbi (Translation Look-Aside Buffer Invalidate Entry) instruction
    • using tlbie (Translation Look-Aside Buffer Invalidate Entry) instruction
• addresses
  • adding two general-purpose registers
    • using add (Add) instruction
    • using cax (Compute Address) instruction
  • calculating from an offset less than 32KB
    • using addi (Add Immediate) instruction
    • using cal (Compute Address Lower) instruction
  • calculating from an offset more than 32KB
    • using addis (Add Immediate Shifted) instruction
    • using cau (Compute Address Upper) instruction
• addressing
  • absolute
  • absolute immediate
  • explicit-based
  • implicit-based
  • location counter
  • pseudo-ops
  • relative immediate
• addze (Add to Zero Extended) instruction
• ae (Add Extended) instruction
• ai. (Add Immediate and Record) instruction
• ai (Add Immediate) instruction
• alias
  • creating for an illegal name in syntax
    • using .rename pseudo-op
• ame (Add to Minus One Extended) instruction
• and (AND) instruction
• andc (AND with Complement) instruction
• andi. (AND Immediate) instruction
• andil. (AND Immediate Lower) instruction
• andis. (AND Immediate Shifted) instruction
• andiu. (AND Immediate Upper) instruction
• Appendix H: Value Definitions
• architecture
  • multiple hardware support
  • POWER and PowerPC
• as command
  • flags
• assembler
  • features
  • interpreting a listing
  • passes
• assembling
  • program
  • with the cc command
• aze (Add to Zero Extended) instruction

• b (Branch) instruction
• base address
  • specifying
    • using .using pseudo-op
• base register
  • assigning a number for
    • using .using pseudo-op
  • stop using specified register as
    • using .drop pseudo-op
• bbf[l][a] extended mnemonic
• bbfc[l] extended mnemonic
• bbfr[l] extended mnemonic
• bbt[l][a] extended mnemonic
• bbtc[l] extended mnemonic
• bbtr[l] extended mnemonic
• bc (Branch Conditional) instruction
• bcc (Branch Conditional to Count Register) instruction
• bcctr (Branch Conditional to Count Register) instruction
• bclr (Branch Conditional Register) instruction
• bcr (Branch Conditional Register) instruction
• bctr[l] extended mnemonic (1), (2)
• bdn[l][a] extended mnemonic
• bdnr[l] extended mnemonic
• bdnz[l][a] extended mnemonic
• bdnzf[l][a] extended mnemonic
• bdnzflr[l] extended mnemonic
• bdnzt[l][a] extended mnemonic
• bdnztlr[l] extended mnemonic
• bdz[l][a] extended mnemonic
• bdzf[l][a] extended mnemonic
• bdzflr[l] extended mnemonic
• bdzlr[l] extended mnemonic
• bdzr[l] extended mnemonic
• bdzt[l][a] extended mnemonic
• bdztlr[l] extended mnemonic
• bf[l][a] extended mnemonic
• bfctr[l] extended mnemonic
• bflr[l] extended mnemonic
• bl (Branch and Link) instruction
• blr[l] extended mnemonic
• br[l] extended mnemonic
• branch instructions
  • extended mnemonics of
• branch prediction
  • extended mnemonics for
• bt[l][a] extended mnemonic
• btctr[l] extended mnemonic
• btlr[l] extended mnemonic

• caches
  • using clcs (Cache Line Compute Size) instruction
  • using clf (Cache Line Flush) instruction
  • using cli (Cache Line Invalidate) instruction
  • using dcbf (Data Cache Block Flush) instruction
  • using dcbi (Data Cache Block Invalidate) instruction
  • using dcbst (Data Cache Block Store) instruction
  • using dcbt (Data Cache Block Touch) instruction
  • using dcbtst (Data Cache Block Touch for Store) instruction
  • using dcbz (Data Cache Block Set to Zero) instruction
  • using dclst (Data Cache Line Store) instruction
  • using dclz (Data Cache Line Set to Zero) instruction
  • using dcs (Data Cache Synchronize) instruction
  • using icbi (Instruction Cache Block Invalidate) instruction
  • using ics (Instruction Cache Synchronize) instruction
• cal (Compute Address Lower) instruction
• called routines
• calling conventions
  • support for
    • pseudo-ops
• calling routines
• cau (Compute Address Upper) instruction
• cax (Compute Address) instruction
• cc command
  • assembling and linking with
• character set
• character values
  • assembling into consecutive bytes
    • using .string pseudo-op
• clcs (Cache Line Compute Size) instruction
• clf (Cache Line Flush) instruction
• cli (Cache Line Invalidate) instruction
• clrldi extended mnemonic
• clrlsldi extended mnemonic
• clrlwi extended mnemonic
• clrrdi extended mnemonic
• clrrwi extended mnemonic
• clrslwi extended mnemonic
• cmp (Compare) instruction
• cmpi (Compare Immediate) instruction
• cmpl (Compare Logical) instruction
• cmpli (Compare Logical Immediate) instruction
• cmplw extended mnemonic
• cmplwi extended mnemonic
• cmpw extended mnemonic
• cmpwi extended mnemonic
• cntlz (Count Leading Zeros) instruction
• cntlzd (Count Leading Zeros Double Word) Instruction (1), (2)
• cntlzw (Count Leading Zeros Word) instruction
• common blocks
  • defining
    • using .comm pseudo-op
  • identifying the beginning of
    • using .bc pseudo-op
  • identifying the end of
    • using .ec pseudo-op
• Condition Register (1), (2), (3)
  • copying bit 3 from the Fixed-Point Exception Register into
    • using mcrxr (Move to Condition Register from XER) instruction
  • copying general-purpose register contents into
    • using mtcrf (Move to Condition Register Fields) instruction
  • copying Summary Overflow bit from the Fixed-Point Exception Register into
    • using mcrxr (Move to Condition Register from XER) instruction
  • copying the Carry bit from the Fixed-Point Exception Register into
    • using mcrxr (Move to Condition Register from XER) instruction
  • copying the Overflow bit from the Fixed-Point Exception Register into
    • using mcrxr (Move to Condition Register from XER) instruction
• Condition Register bit (1), (2), (3)
  • placing ANDing and the complement in a Condition Register bit
    • using crandc (Condition Register AND with Complement) instruction
  • placing complemented result of ANDing two Condition Register bits in
    • using crnand (Condition Register NAND) instruction
  • placing complemented result of XORing two Condition Register bits in
    • using creqv (Condition Register Equivalent) instruction
  • placing result of ORing and complement of Condition Register bit in
    • using crorc (Condition Register OR with Complement) instruction
  • placing result of ORing two Condition Register bits in
    • using cror (Condition Register OR) instruction
  • placing result of XORing two Condition Register bits in
    • using crxor (Condition Register XOR) instruction
• Condition Register field
  • copying the contents from one into another
    • using mcrf (Move Condition Register Field) Instruction
• condition register logical instructions
  • extended mnemonics
• constants
• control sections
  • giving a storage class to
    • using .csect pseudo-op
  • giving an alignment to
    • using .csect pseudo-op
  • grouping code into
    • using .csect pseudo-op
  • grouping data into
    • using .csect pseudo-op
  • naming
    • using .csect pseudo-op
• Count Register
  • branching conditionally to address in
    • using bcc (Branch Conditional to Count Register) instruction
    • using bcctr (Branch Conditional to Count Register) instruction
• CPU ID
  • determination
• crand (Condition Register AND) instruction
• crandc (Condition Register AND with Complement) instruction
• crclr extended mnemonic
• creqv (Condition Register Equivalent) instruction
• crmove extended mnemonic
• crnand (Condition Register NAND) instruction
• crnor (Condition Register) instruction
• crnot extended mnemonic
• cror (Condition Register OR) instruction
• crorc (Condition Register OR with Complement) instruction
• cross-reference
  • interpreting a symbol
  • mnemonics
• crset extended mnemonic
• crxor (Condition Register XOR) instruction

• data
  • accessing through the TOC
• data alignment
  • pseudo-ops
• data definition
  • pseudo-ops
• dcbf (Data Cache Block Flush) instruction
• dcbi (Data Cache Block Invalidate) instruction
• dcbst (Data Cache Block Store) instruction
• dcbt (Data Cache Block Touch) instruction
• dcbtst (Data Cache Block Touch for Store) instruction
• dcbz (Data Cache Block Set to Zero) instruction
• dclst (Data Cache Line Store) instruction
• dclz (Data Cache Line Set to Zero) instruction
• dcs (Data Cache Synchronize) instruction
• debug traceback tags
  • defining
    • using .tbtag pseudo-op
• debuggers
  • providing information to
    • using .stabx pseudo-op
  • symbol table entries
    • pseudo-ops
• defining
  • table of contents
    • using .tocof pseudo-op
• div (Divide) instruction
• divd (Divide Double Word) Instruction (1), (2)
• divdu (Divide Double Word Unsigned) Instruction (1), (2)
• divs (Divide Short) instruction
• divw (Divide Word) instruction
• divwu (Divide Word Unsigned) instruction
• double floating-point constant
  • storing at the next fullword location
    • using .double pseudo-op
• double-precision floating-point
  • adding 64-bit operand to result of multiplying two operands
    • using fma (Floating Multiply-Add) instruction (1), (2)
    • using fmadd (Floating Multiply-Add) instruction (1), (2)
  • adding two 64-bit operands
    • using fa (Floating Add) instruction
    • using fadd (Floating Add Double) instruction
  • dividing 64-bit operands
    • using fd (Floating Divide) instruction
    • using fdiv (Floating Divide Double) instruction
  • multiplying two 64-bit operands
    • using fm (Floating Multiply) instruction
    • using fmul (Floating Multiply Double) instruction
  • multiplying two 64-bit operands and adding to 64-bit operand
    • using fnma (Floating Negative Multiply-Add) instruction
    • using fnmadd (Floating Negative Multiply-Add Double) instruction
  • multiplying two 64-bit operands and subtracting 64-bit operand
    • using fnms (Floating Negative Multiply-Subtract) instruction
    • using fnmsub (Floating Negative Multiply-Subtract Double) instruction
  • rounding 64-bit operand to single precision
    • using frsp (Floating Round to Single Precision) instruction
  • subtracting 64-bit operand from result of multiplying two 64-bit operands
    • using fms (Floating Multiply-Subtract) instruction
    • using fmsub (Floating Multiply-Subtract Double) instruction
  • subtracting 64-bit operands
    • using fs (Floating Subtract) instruction
    • using fsub (Floating Subtract Double) instruction
• doz (Difference or Zero) instruction
• dozi (Difference or Zero Immediate) instruction
• dummy control sections
  • identifying the beginning of
    • using .dsect pseudo-op
  • identifying the continuation of
    • using .dsect pseudo-op

• eciwx (External Control In Word Indexed) instruction
• ecowx (External Control Out Word Indexed) instruction
• eieio (Enforce In-Order Execution of I/O) instruction
• epilogs
  • actions
• eqv (Equivalent) instruction
• error
  • messages
• error conditions
  • detection
• expressions
  • assembling into a TOC entry
    • using .tc pseudo-op
  • assembling into consecutive bytes
  • assembling into consecutive double-words
    • using .llong pseudo-op
  • assembling into consecutive fullwords
    • using .long pseudo-op
  • assembling into consecutive halfwords
    • using .short pseudo-op
  • assembling the value into consecutive bytes
    • using .vbyte pseudo-op
  • facilitating the use of local symbols in
    • using .tocof pseudo-op
  • setting a symbol equal in type and value to
    • using .set pseudo-op
• extended mnemonics
  • for branch prediction
  • of 32-bit fixed-point rotate and shift instructions
  • of 64-bit fixed-point rotate and shift instructions
  • of branch instructions
  • of condition register logical instructions
  • of fixed-point arithmetic instructions
  • of fixed-point compare instructions
  • of fixed-point load instructions
  • of fixed-point logical instructions
  • of fixed-point trap instructions
  • of moving from or to special-purpose registers
• external symbol definitions
  • pseudo-ops
• extldi extended mnemonic
• extlwi extended mnemonic
• extrdi extended mnemonic
• extrwi extended mnemonic
• exts (Extend Sign) instruction
• extsb (Extend Sign Byte) instruction
• extsh (Extend Sign Halfword) instruction
• extsw (Extend Sign Word) Instruction (1), (2)

• fa (Floating Add) instruction
• fabs (Floating Absolute Value) instruction
• fadd (Floating Add Double) instruction
• fadds (Floating Add Single) instruction
• fcfid (Floating Convert from Integer Double Word) Instruction (1), (2)
• fcir (Floating Convert Double to Integer with Round) instruction
• fcirz (Floating Convert Double to Integer with Round to Zero) instruction
• fcmpo (Floating Compare Ordered) instruction
• fcmpu (Floating Compare Unordered) instruction
• fctid (Floating Convert to Integer Double Word) Instruction (1), (2)
• fctidz (Floating Convert to Integer Double Word with Round toward Zero) Instruction (1), (2)
• fctiw (Floating Convert to Integer Word) instruction
• fctiwz (Floating Convert to Integer Word with Round to Zero) instruction
• fd (Floating Divide) instruction
• fdiv (Floating Divide Double) instruction
• fdivs (Floating Divide Single) instruction
• fixed-point arithmetic instructions
  • extended mnemonics
• fixed-point compare instructions
  • extended mnemonics
• fixed-point load instructions
• fixed-point logical instructions
  • extended mnemonics
• fixed-point trap instructions
• floating-point constants
  • storing at the next fullword location
    • using .float pseudo-op
• floating-point numbers
• floating-point registers
  • calculating a square root
    • using fsqrt (Floating Square Root) instruction (1), (2)
  • comparing contents of two
    • using fcmpo (Floating Compare Ordered) instruction
    • using fcmpu (Floating Compare Unordered) instruction
  • converting 64-bit double-precision floating-point operand
    • using fcir (Floating Convert to Integer with Round) instruction
    • using fcirz (Floating Convert Double to Integer with Round to Zero) instruction
    • using fctiw (Floating Convert to Integer Word) instruction
    • using fctiwz (Floating Convert to Integer Word with Round to Zero) instruction
  • converting contents to single precision
    • stfsx (Store Floating-Point Single Indexed) instruction
    • using stfs (Store Floating-Point Single) instruction
    • using stfsu (Store Floating-Point Single with Update) instruction
    • using stfsux (Store Floating-Point Single with Update Indexed) instruction
  • copying contents into Floating-Point Status and Control Register
    • using mtfsf (Move to FPSCR Fields) instruction
  • interpreting the contents of
  • loading converted double-precision floating-point number into
    • using lfs (Load Floating-Point Single) instruction
    • using lfsu (Load Floating-Point Single with Update) instruction
    • using lfsux (Load Floating-Point Single with Update Indexed) instruction
  • loading doubleword of data from memory into
    • using lfd (Load Floating-Point Double) instruction
    • using lfdu (Load Floating-Point Double with Update) instruction
    • using lfdux (Load Floating-Point Double with Update Indexed) instruction
    • using lfdx (Load Floating-Point Double Indexed) instruction
  • loading quadword of data from memory into
    • using lfq (Load Floating-Point Quad) instruction
    • using lfqu (Load Floating-Point Quad with Update) instruction
    • using lfqux (Load Floating-Point Quad with Update Indexed) instruction
    • using lfqx (Load Floating-Point Quad Indexed) instruction
  • moving contents of to another
    • using fmr (Floating Move Register) instruction
  • negating absolute contents of
    • using fnabs (Floating Negative Absolute Value) instruction
  • negating contents of
    • using fneg (Floating Negate) instruction
  • storing absolute value of contents into another
    • using fabs (Floating Absolute Value) instruction
  • storing contents into doubleword storage
    • using stfd (Store Floating-Point Double) instruction
    • using stfdu (Store Floating-Point Double with Update) instruction
    • using stfdux (Store Floating-Point Double with Update Indexed) instruction
    • using stfdx (Store Floating-Point Double Indexed) instruction
  • storing contents into quadword storage
    • using stfq (Store Floating-Point Quad) instruction
    • using stfqu (Store Floating-Point Quad with Update) instruction
    • using stfqux (Store Floating-Point Quad with Update Indexed) instruction
    • using stfqx (Store Floating-Point Quad Indexed) instruction
  • storing contents into word storage
    • using stfiwx (Store Floating-Point as Integer word Indexed) instruction
• Floating-Point Status and Control Register
  • copying an immediate value into a field of
    • using mtfsfi (Move to FPSCR Field Immediate) instruction
  • copying the floating-point register contents into
    • using mtfsf (Move to FPSCR Fields) instruction
  • filling the upper 32 bits after loading
    • using mffs (Move from FPSCR) instruction
  • loading contents into a floating-point register
    • using mffs (Move from FPSCR) instruction
  • setting a specified bit to 1
    • using mtfsb1 (Move to FPSCR Bit 1) instruction
  • setting a specified bit to zero
    • using mtfsb0 (Move to FPSCR Bit 0) instruction
• Floating-Point Status and Control Register field
  • copying the bits into the Condition Register
    • using mcrfs (Move to Condition Register from FPSCR) instruction
• fm (Floating Multiply) instruction
• fma (Floating Multiply-Add) instruction
• fmadd (Floating Multiply-Add Double) instruction
• fmadds (Floating Multiply-Add Single) instruction
• fmr (Floating Move Register) instruction
• fms (Floating Multiply-Subtract) instruction
• fmsub (Floating Multiply-Subtract Double) instruction
• fmsubs (Floating Multiply-Subtract Single) instruction
• fmul (Floating Multiply) instruction
• fnabs (Floating Negative Absolute Value) instruction
• fneg (Floating Negate) instruction
• fnma (Floating Negative Multiply-Add) instruction
• fnmadd (Floating Negative Multiply-Add Double) instruction
• fnmadds (Floating Negative Multiply-Add Single) instruction
• fnms (Floating Negative Multiply-Subtract) instruction
• fnmsub (Floating Negative Multiply-Subtract Double) instruction
• fnmsubs (Floating Negative Multiply-Subtract Single) instruction
• fres (Floating Reciprocal Estimate Single) instruction
• frsp (Floating Round to Single Precision) instruction
• frsqrte (Floating Reciprocal Square Root Estimate) instruction
• fs (Floating Subtract) instruction
• fsel (Floating-Point Select) instruction
• fsqrt (Floating Square Root, Double-Precision) Instruction (1), (2)
• fsqrts (Floating Square Root Single) Instruction (1), (2)
• fsub (Floating Subtract Double) instruction
• fsubs (Floating Subtract Single) instruction
• functions
  • identifying
    • using .function pseudo-op
  • identifying the beginning of
    • using .bf pseudo-op
  • identifying the end of
    • using .ef pseudo-op

• general-purpose registers
  • adding complement from -1 with carry
    • using sfme (Subtract from Minus One Extended) instruction
    • using subfme (Subtract from Minus One Extended) instruction
  • adding contents to the value of the Carry bit
    • using adde (Add Extended) instruction
    • using ae (Add Extended) instruction
  • adding contents with 16-bit signed integer
    • using addic (Add Immediate Carrying) instruction
    • using ai (Add Immediate) instruction
  • adding contents with Carry bit and -1
    • using addme (Add to Minus One Extended) instruction
    • using ame (Add to Minus One Extended) instruction
  • adding immediate value to contents of
    • using addic. (Add Immediate Carrying and Record) instruction
    • using ai. (Add Immediate and Record) instruction
  • adding the complement of the contents with the Carry bit
    • using sfze (Subtract from Zero Extended) instruction
    • using subfze (Subtract from Zero Extended) instruction
  • adding the contents of
    • using addc (Add Carrying) instruction
  • adding zero and the value of the Carry bit to the contents of
    • using addze (Add to Zero Extended) instruction
    • using aze (Add to Zero Extended) instruction
  • ANDing a generated mask with the rotated contents of
    • using rlinm (Rotated Left Immediate Then AND with Mask) instruction
    • using rlnm (Rotate Left Then AND with Mask) instruction
    • using rlwinm (Rotated Left Word Immediate Then AND with Mask) instruction
    • using rlwnm (Rotate Left Word Then AND with Mask) instruction
  • ANDing an immediate value with
    • using andi. (AND Immediate) instruction
    • using andil. (AND Immediate Lower) instruction
  • ANDing contents with the complement of another
    • using andc (AND with Complement) instruction
  • ANDing logically the contents of
    • using and (AND) instruction
  • ANDing most significant 16 bits with a 16-bit unsigned integer
    • using andis. (AND Immediate Shifted) instruction
    • using andiu. (AND Immediate Upper) instruction
  • changing the arithmetic sign of the contents of
    • using neg (Negate) instruction
  • comparing contents algebraically
    • using cmp (Compare) instruction
  • comparing contents logically
    • using cmpl (Compare Logical) instruction
  • comparing contents with unsigned integer logically
    • using cmpli (Compare Logical Immediate) instruction
  • comparing contents with value algebraically
    • using cmpi (Compare Immediate) instruction
  • computing difference between contents and signed 16-bit integer
    • using dozi (Difference or Zero Immediate) instruction
  • computing difference between contents of two
    • using doz (Difference or Zero) instruction
  • copying bit 0 of halfword into remaining 16 bits
    • using lha (Load Half Algebraic) instruction
  • copying bit 0 of halfword into remaining 16 bits of
    • using lhau (Load Half Algebraic with Update) instruction
    • using lhaux (Load Half Algebraic with Update Indexed) instruction
    • using lhax (Load Half Algebraic Indexed) instruction
  • copying Condition Register contents into
    • using mfcr (Move from Condition Register) instruction
    • using mfocrf (Move from One Condition Register Field) instruction
    • using mtocrf (Move to One Condition Register Field) instruction
  • copying contents into a special-purpose register
    • using mtspr (Move to Special-Purpose Register) instruction
  • copying contents into the Condition Register
    • using mtcrf (Move to Condition Register Fields) instruction
  • copying special-purpose register contents into
    • using mfspr (Move from Special-Purpose Register) instruction
  • copying the Machine State Register contents into
    • using mfmsr (Move from Machine State Register) instruction
  • dividing by contents of
    • using div (Divide) instruction
    • using divs (Divide Short) instruction
  • generating mask of ones and zeros for loading into
    • using maskg (Mask Generate) instruction
  • inserting contents of one into another under bit-mask control
    • maskir (Mask Insert from Register) instruction
  • loading consecutive bytes from memory into consecutive
    • using lsi (Load String Immediate) instruction
    • using lswi (Load String Word Immediate) instruction
    • using lswx (Load String Word Indexed) instruction
    • using lsx (Load String Indexed) instruction
  • loading consecutive bytes into
    • using lscbx (Load String and Compare Byte Indexed) instruction
  • loading consecutive words into several
    • using lm (Load Multiple) instruction
    • using lmw (Load Multiple Word) instruction
  • loading word of data from memory into
    • using lu (Load with Update) instruction
    • using lwzu (Load Word with Zero Update) instruction
  • loading word of data into
    • using lux (Load with Update Indexed) instruction
    • using lwzux (Load Word and Zero with Update Indexed) instruction
    • using lwzx (Load Word and Zero Indexed) instruction
    • using lx (Load Indexed) instruction
  • logically complementing the result of ANDing the contents of two
    • using nand (NAND) instruction
  • logically complementing the result of ORing the contents of two
    • using nor (NOR) instruction
  • logically ORing the content of two
    • using or (OR) instruction
  • logically ORing the contents with the complement of the contents of
    • using orc (OR with Complement) instruction
  • merging a word of zeros with the MQ Register contents
    • using srlq (Shift Right Long with MQ) instruction
  • merging rotated contents with a word of 32 sign bits
    • using sra (Shift Right Algebraic) instruction
    • using srai (Shift Right Algebraic Immediate) instruction
    • using sraiq (Shift Right Algebraic Immediate with MQ) instruction
    • using sraq (Shift Right Algebraic with MQ) instruction
    • using sraw (Shift Right Algebraic Word) instruction
    • using srawi (Shift Right Algebraic Word Immediate) instruction
  • merging rotated contents with the MQ Register contents
    • using sreq (Shift Right Extended with MQ) instruction
    • using srliq (Shift Right Long Immediate with MQ) instruction
    • using srlq (Shift Right Long with MQ) instruction
  • merging the rotated contents results with the MQ Register contents
    • using slliq (Shift Left Long Immediate with MQ) instruction
  • merging with masked MQ Register contents
    • using sleq (Shift Left Extended with MQ) instruction
  • multiplying a word
    • using mulhw (Multiply High Word) instruction
    • using mulhwu (Multiply High Word Unsigned) instruction
  • multiplying the contents by a 16-bit signed integer
    • using muli (Multiply Immediate) instruction
    • using mulli (Multiply Low Immediate) instruction
  • multiplying the contents of two
    • using mul (Multiply) instruction
  • multiplying the contents of two general-purpose registers into
    • using mullw (Multiply Low Word) instruction
    • using muls (Multiply Short) instruction
  • negating the absolute value of
    • using nabs (Negative Absolute) instruction
  • ORing the lower 16 bits of the contents with a 16-bit unsigned integer
    • using ori (OR Immediate) instruction
    • using oril (OR Immediate Lower) instruction
  • ORing the upper 16 bits of the contents with a 16-bit unsigned integer
    • using oris (OR Immediate Shifted) instruction
    • using oriu (OR Immediate Upper) instruction
  • placing a copy of rotated contents in the MQ Register
    • using srea (Shift Right Extended Algebraic) instruction
  • placing a copy of rotated data in the MQ register
    • using sle (Shift Left Extended) instruction
  • placing number of leading zeros in
    • using cntlz (Count Leading Zeros) instruction
    • using cntlzw (Count Leading Zeros Word) instruction
  • placing rotated contents in the MQ Register
    • using sliq (Shift Left Immediate with MQ) instruction
    • using slq (Shift Left with MQ) instruction
    • using sriq (Shift Right Immediate with MQ) instruction
  • placing the absolute value of the contents in
    • using abs (Absolute) instruction
  • placing the logical AND of the rotated contents in
    • using srq (Shift Right with MQ) instruction
  • placing the rotated contents in the MQ register
    • using srq (Shift Right with MQ) instruction
  • rotating contents left
    • using rlmi (Rotate Left Then Mask Insert) instruction
    • using sl (Shift Left) instruction
    • using sle (Shift Left Extended) instruction
    • using sliq (Shift Left Immediate with MQ) instruction
    • using slliq (Shift Left Long Immediate with MQ) instruction
    • using sr (Shift Right) instruction
    • using sra (Shift Right Algebraic) instruction
    • using sraq (Shift Right Algebraic with MQ) instruction
    • using srea (Shift Right Extended Algebraic) instruction
    • using sreq (Shift Right Extended with MQ) instruction
    • using sriq (Shift Right Immediate with MQ) instruction
  • setting remaining 16 bits to 0 after loading
    • using lhz (Load Half and Zero) instruction
  • setting remaining 16 bits to zero after loading
    • using lhzu (Load Half and Zero with Update) instruction
    • using lhzx (Load Half and Zero Indexed) instruction
  • setting remaining 16 bits to zero in
    • using lhbrx (Load Half Byte-Reverse Indexed) instruction
    • using lhzux (Load Half and Zero with Update Indexed) instruction
  • storing a byte into memory with the address in
    • using stbu (Store Byte with Update) instruction
  • storing a byte of data into memory
    • using stb (Store Byte) instruction
    • using stbux (Store Byte with Update Indexed) instruction
    • using stbx (Store Byte Indexed) instruction
  • storing a byte-reversed word of data into memory
    • using stbrx (Store Byte Reverse Indexed) instruction
    • using stwbrx (Store Word Byte Reverse Indexed) instruction
  • storing a halfword of data into memory
    • using sth (Store Half) instruction
    • using sthu (Store Half with Update) instruction
    • using sthux (Store Half with Update Indexed) instruction
    • using sthx (Store Half Indexed) instruction
  • storing a word of data into memory
    • using st (Store) instruction
    • using stu (Store with Update) instruction
    • using stux (Store with Update Indexed) instruction
    • using stw (Store Word) instruction
    • using stwcx (Store Word Conditional Indexed) instruction
    • using stwu (Store Word with Update) instruction
    • using stwux (Store Word with Update Indexed) instruction
    • using stwx (Store Word Indexed) instruction
    • using stx (Store Indexed) instruction
  • storing consecutive bytes from consecutive registers into memory
    • using stsi (Store String Immediate) instruction
    • using stswi (Store String Word Immediate) instruction
    • using stswx (Store String Word Indexed) instruction
    • using stsx (Store String Indexed) instruction
  • storing contents of consecutive registers into memory
    • using stm (Store Multiple) instruction
    • using stmw (Store Multiple Word) instruction
  • storing halfword of data with 2 bytes reversed into memory
    • using sthbrx (Store Half Byte-Reverse Indexed) instruction
  • subtracting contents of one from another
    • using sf (Subtract From) instruction
    • using subfc (Subtract from Carrying) instruction
  • subtracting from
    • using subf (Subtract From) instruction
  • subtracting the contents from a 16-bit signed integer
    • using sfi (Subtract from Immediate) instruction
    • using subfic (Subtract from Immediate Carrying) instruction
  • subtracting the contents from the sum of
    • using sfe (Subtract from Extended)
    • using subfe (Subtract from Extended)
  • subtracting the value of a signed integer from the contents of
    • using si. (Subtract Immediate and Record) instruction
    • using si (Subtract Immediate) instruction
  • translate effective address into real address and store in
    • using rac (Real Address Compute) instruction
  • using a (Add) instruction
  • using divw (Divide Word) instruction
  • using divwu (Divide Word Unsigned) instruction
  • using extsb (Extend Sign Byte) instruction
  • using lfq (Load Floating-Point Quad) instruction
  • using lfqu (Load Floating-Point Quad with Update) instruction
  • using lfqux (Load Floating-Point Quad with Update Indexed) instruction
  • using lfqx (Load Floating-Point Quad Indexed) instruction
  • using lwarx (Load Word and Reserve Indexed) instruction
  • using rlimi (Rotate Left Immediate Then Mask Insert) instruction
  • using rlnm (Rotate Left Then AND with Mask) instruction
  • using rlwimi (Rotate Left Word Immediate Then Mask Insert) instruction
  • using rlwnm (Rotate Left Word Then AND with Mask) instruction
  • using rrib (Rotate Right and Insert Bit) instruction
  • using sllq (Shift Left Long with MQ) instruction
  • using slq (Shift Left with MQ) instruction
  • using slw (Shift Left Word) instruction
  • using srai (Shift Right Algebraic Immediate) instruction
  • using sraiq (Shift Right Algebraic Immediate with MQ) instruction
  • using sraw (Shift Right Algebraic Word) instruction
  • using srawi (Shift Right Algebraic Word Immediate) instruction
  • using sre (Shift Right Extended) instruction
  • using srliq (Shift Right Long Immediate with MQ) instruction
  • using srlq (Shift Right Long with MQ) instruction
  • using srq (Shift Right with MQ) instruction
  • using srw (Shift Right Word) instruction
  • using stfq (Store Floating-Point Quad) instruction
  • using stfqu (Store Floating-Point Quad with Update) instruction
  • using stfqux (Store Floating-Point Quad with Update Indexed) instruction
  • using stfqx (Store Floating-Point Quad Indexed) instruction
  • XORing contents of
    • using eqv (Equivalent) instruction
  • XORing the contents and 16-bit unsigned integer
    • using xori (XOR Immediate) instruction
    • using xoril (XOR Immediate Lower) instruction
  • XORing the contents of two
    • using xor (XOR) instruction
  • XORing the upper 16 bits with a 16-bit unsigned integer
    • using xoris (XOR Immediate Shift) instruction
    • using xoriu (XOR Immediate Upper) instruction

• hash values
  • associating with external symbol
    • using .hash pseudo-op
• host machine independence

• icbi (Instruction Cache Block Invalidate) instruction
• ics (Instruction Cache Synchronize) instruction
• implementation
  • multiple platform support
• included files
  • identifying the beginning of
    • using .bi pseudo-op
  • identifying the end of
    • using .ei pseudo-op
• inner blocks
  • identifying the beginning of
    • using .bb pseudo-op
  • identifying the end of
    • using .eb pseudo-op
• inslwi extended mnemonic
• insrdi extended mnemonic
• insrwi extended mnemonic
• installing the assembler
• instruction fields
• instruction forms
• instructions
  • branch
  • common to POWER and PowerPC
  • condition register
  • fixed-point
    • address computation
    • arithmetic
    • compare
    • load and store
    • load and store with update
    • logical
    • move to or from special-purpose registers
    • rotate and shift
    • string
    • trap
  • floating-point
    • arithmetic
    • compare
    • conversion
    • load and store
    • move
    • multiply-add
    • status and control register
  • PowerPC
  • PowerPC 601 RISC Microprocessor
  • sorted by mnemonic
  • sorted by primary and extended op code
  • system call
• intermodule calls using the TOC
• interrupts
  • generating when a condition is true
    • using t (Trap) instruction
    • using ti (Trap Immediate) instruction
    • using tw (Trap Word) instruction
    • using twi (Trap Word Immediate) instruction
  • supervisor call
    • generating an interrupt
  • system call
    • generating an interrupt
  • system call vectored
    • generating an interrupt
• isync (Instruction Synchronize) instruction

• l (Load) instruction
• la extended mnemonic
• lbrx (Load Byte-Reverse Indexed) instruction
• lbz (Load Byte and Zero) instruction
• lbzux (Load Byte and Zero with Update Indexed) instruction
• lbzx (Load Byte and Zero Indexed) instruction
• ld (Load Double Word) instruction (1), (2)
• ldarx (Store Double Word Reserve Indexed) Instruction (1), (2)
• ldu (Store Double Word with Update) Instruction (1), (2)
• ldux (Store Double Word with Update Indexed) Instruction (1), (2)
• ldx (Store Double Word Indexed) Instruction (1), (2)
• leading zeros
  • placing in a general-purpose register
    • using cntlz (Count Leading Zeros) instruction
    • using cntlzw (Count Leading Zeros Word) instruction
• lfd (Load Floating-Point Double) instruction
• lfdu (Load Floating-Point Double with Update) instruction
• lfdux (Load Floating-Point Double with Update Indexed) instruction
• lfdx (Load Floating-Point Double Indexed) instruction
• lfq (Load Floating-Point Quad) instruction
• lfqu (Load Floating-Point Quad with Update) instruction
• lfqux (Load Floating-Point Quad with Update Indexed) instruction
• lfqx (Load Floating-Point Quad Indexed) instruction
• lfs (Loading Floating-Point Single) instruction
• lfsu (Load Floating-Point Single with Update) instruction
• lfsux (Load Floating-Point Single with Update Indexed) instruction
• lfsx (Load Floating-Point Single Indexed) instruction
• lha (Load Half Algebraic) instruction
• lhau (Load Half Algebraic with Update) instruction
• lhaux (Load Half Algebraic with Update Indexed) instruction
• lhax (Load Half Algebraic Indexed) instruction
• lhbrx (Load Half Byte-Reverse Indexed) instruction
• lhz (Load Half and Zero) instruction
• lhzu (Load Half and Zero with Update) instruction
• lhzux (Load Half and Zero with Update Indexed) instruction
• lhzx (Load Half and Zero Indexed) instruction
• li extended mnemonic
• lil extended mnemonic
• line format
• line numbers
  • identifying
    • using .line pseudo-op
• lines
  • representing the number of
    • using .xline pseudo-op
• Link Register
  • branching conditionally to address in
    • using bclr (Branch Conditional Register) instruction
    • using bcr (Branch Conditional Register) instruction
• linkage
  • subroutine linkage convention
• linker
  • making a symbol globally visible to the
    • using .globl pseudo-op
• linking
  • with the cc command
• lis extended mnemonic
• listing
  • interpreting an assembler
• liu extended mnemonic
• lm (Load Multiple) instruction
• lmw (Load Multiple Word) instruction
• local common section
  • defining a
    • using .lcomm pseudo-op
• local symbol
  • facilitating use in expressions
    • using .tocof pseudo-op
• location counter
  • advancing until a specified boundary is reached
    • using .align pseudo-op
  • setting the value of the current
    • using .org pseudo-op
• logical processing
  • model
• lq (Load Quad Word) instruction
• lscbx (Load String and Compare Byte Indexed) instruction
• lsi (Load String Immediate) instruction
• lswi (Load String Word Immediate) instruction
• lswx (Load String Word Indexed) instruction
• lsx (Load String Indexed) instruction
• lu (Load with Update) instruction
• lux (Load with Update Indexed) instruction
• lwa (Load Word Algebraic) Instruction (1), (2)
• lwarx (Load Word and Reserve Indexed) instruction
• lwaux (Load Word Algebraic with Update Indexed) Instruction (1), (2)
• lwax (Load Word Algebraic Indexed) Instruction (1), (2)
• lwbrx (Load Word Byte-Reverse Indexed) instruction
• lwz (Load Word and Zero) instruction
• lwzu (Load Word with Zero Update) instruction
• lwzux (Load Word and Zero with Update Indexed) instruction
• lwzx (Load Word and Zero Indexed) instruction
• lx (Load Indexed) instruction

• Machine State Register
  • after a supervisor call and reinitialize
    • using rfsvc (Return from SVC) instruction
  • continue processing and reinitialize
    • using rfi (Return from Interrupt) instruction
  • copying the contents into a general-purpose register
    • using mfmsr (Move from Machine State Register) instruction
• main memory
  • ensuring storage access in
    • using eieio (Enforce In-Order Execution of I/O) instruction
• maskg (Mask Generate) instruction
• maskir (Mask Insert from Register) instruction
• masks
  • generating instance of ones and zeros
    • using maskg (Mask Generate) instruction
• mcrf (Move Condition Register Field) instruction
• mcrfs (Move to Condition Register from FPSCR) instruction
• mcrxr (Move to Condition Register from XER) instruction
• memory
  • loading a byte of data from
    • using lbzu (Load Byte and Zero with Update) instruction
  • loading byte of data from
    • using lbz (Load Byte and Zero) instruction
    • using lbzux (Load Byte and Zero with Update Indexed) instruction
  • loading byte of data into
    • using lbzx (Load Byte and Zero Indexed) instruction
  • loading byte-reversed halfword of data from
    • using lhbrx (Load Half Byte-Reverse Indexed) instruction
  • loading byte-reversed word of data from
    • using lbrx (Load Byte-Reverse Indexed) instruction
    • using lwbrx (Load Word Byte-Reverse Indexed) instruction
  • loading consecutive bytes from
    • using lsi (Load String Immediate) instruction
    • using lswi (Load String Word Immediate) instruction
    • using lswx (Load String Word Indexed) instruction
    • using lsx (Load String Indexed) instruction
  • loading doubleword of data from
    • using lfd (Load Floating-Point Double) instruction
    • using lfdu (Load Floating-Point Double with Update) instruction
    • using lfdux (Load Floating-Point Double with Update Indexed) instruction
    • using lfdx (Load Floating-Point Double Indexed) instruction
  • loading halfword of data from
    • using lha (Load Half Algebraic) instruction
    • using lhau (Load Half Algebraic with Update) instruction
    • using lhaux (Load Half Algebraic with Update Indexed) instruction
    • using lhax (Load Half Algebraic Indexed) instruction
    • using lhz (Load Half and Zero) instruction
    • using lhzu (Load Half and Zero with Update) instruction
    • using lhzux (Load Half and Zero with Update Indexed) instruction
    • using lhzx (Load Half and Zero Indexed) instruction
  • loading quadword of data from
    • using lfq (Load Floating-Point Quad) instruction
    • using lfqu (Load Floating-Point Quad with Update) instruction
    • using lfqux (Load Floating-Point Quad with Update Indexed) instruction
    • using lfqx (Load Floating-Point Quad Indexed) instruction
  • loading single-precision floating-point number from
    • using lfsu (Load Floating-Point Single with Update) instruction
    • using lfsx (Load Floating-Point Single Indexed) instruction
  • loading single-precision floating-point number into
    • using lfs (Load Floating-Point Single) instruction
    • using lfsux (Load Floating-Point Single with Update Indexed) instruction
  • loading word of data from (1), (2)
    • using lu (Load with Update) instruction
    • using lux (Load with Update Indexed) instruction
    • using lwzu (Load Word with Zero Update) instruction
    • using lwzux (Load Word and Zero with Update Indexed) instruction
    • using lwzx (Load Word and Zero Indexed) instruction
    • using lx (Load Indexed) instruction
  • setting remaining 24 bits after loading into
    • using lbzx (Load Byte and Zero Indexed) instruction
  • setting remaining 24 bits to 0 after loading from
    • using lbz (Load Byte and Zero) instruction
    • using lbzux (Load Byte and Zero with Update Indexed) instruction
  • setting remaining 24 bits to 0 after loading into
    • using lbzu (Load Byte and Zero with Update) instruction
  • storing a quadword of data into
    • using stfq (Store Floating-Point Quad) instruction
    • using stfqu (Store Floating-Point Quad with Update) instruction
    • using stfqux (Store Floating-Point Quad with Update Indexed) instruction
    • using stfqx (Store Floating-Point Quad Indexed) instruction
  • using dcbf (Data Cache Block Flush) instruction
• messages
  • error
  • warning
• mfcr (Move from Condition Register) instruction
• mfctr extended mnemonic
• mfdar extended mnemonic
• mfdec extended mnemonic
• mfdsisr extended mnemonic
• mfear extended mnemonic
• mffs (Move from FPSCR) instruction
• mflr extended mnemonic
• mfmq extended mnemonic
• mfmsr (Move from Machine State Register) instruction
• mfocrf (Move from One Condition Register Field) instruction
• mfpvr extended mnemonic
• mfrtcl extended mnemonic
• mfrtcu extended mnemonic
• mfsdr1 extended mnemonic
• mfspr (Move from Special-Purpose Register) instruction
• mfsprg extended mnemonic
• mfsr (Move from Segment Register) instruction
• mfsri (Move from Segment Register Indirect) instruction
• mfsrin (Move from Segment Register Indirect) instruction
• mfsrr0 extended mnemonic
• mfsrr1 extended mnemonic
• mfxer extended mnemonic
• milicode routines
• mnemonic
  • instructions sorted by
• mnemonics cross-reference
• moving from or to special-purpose registers
  • extended mnemonics
• mr[.] extended mnemonic
• mr (Move Register) instruction
• mtcrf (Move to Condition Register Fields) instruction
• mtctr extended mnemonic
• mtdar extended mnemonic
• mtdec extended mnemonic
• mtdsisr extended mnemonic
• mtear extended mnemonic
• mtfsb0 (Move to FPSCR Bit 0) instruction
• mtfsb1 (Move to FPSCR Bit 1) instruction
• mtfsf (Move to FPSCR Fields) instruction
• mtfsfi (Move to FPSCR Field Immediate) instruction
• mtlr extended mnemonic
• mtmq extended mnemonic
• mtocrf (Move to One Condition Register Field) instruction
• mtrtcl extended mnemonic
• mtrtcu extended mnemonic
• mtsdr1 extended mnemonic
• mtspr (Move to Special-Purpose Register) instruction
• mtsprg extended mnemonic
• mtsrr0 extended mnemonic
• mtsrr1 extended mnemonic
• mtxer extended mnemonic
• mul (Multiply) instruction
• mulhd (Multiply High Double Word) Instruction (1), (2)
• mulhdu (Multiply High Double Word Unsigned) Instruction (1), (2)
• mulhw (Multiply High Word) instruction
• mulhwu (Multiply High Word Unsigned) instruction
• muli (Multiply Immediate) instruction
• mulld (Multiply Low Double Word) Instruction (1), (2)
• mulldo (Multiply Low Double Word) Instruction
• mulli (Multiply Low Immediate) instruction
• mullw (Multiply Low Word) instruction
• muls (Multiply Short) instruction

• nabs (Negative Absolute) instruction
• name
  • creating a synonym or alias for an illegal name
    • using .rename pseudo-op
• nand (NAND) instruction
• neg (Negate) instruction
• nop extended mnemonic
• nor (NOR) instruction
• not[.] extended mnemonic
• notational conventions
  • pseudo-ops

• op code
  • instructions sorted by primary and extended
• operators
• or (OR) instruction
• orc (OR with Complement) instruction
• ori (OR Immediate) instruction
• oril (OR Immediate Lower) instruction
• oris (OR Immediate Shifted) instruction
• oriu (OR Immediate Upper) instruction
• output file
  • skipping a specified number of bytes in
    • using .space pseudo-op

• passes
  • assembler
• POWER and POWER2
  • instructions
• POWER and PowerPC
  • architecture
  • common instructions
• POWER and PowerPC instructions
  • extended mnemonics changes
  • functional differences for
  • PowerPC instructions
  • with same op code
• PowerPC
  • instructions
• PowerPC 601 RISC Microprocessor
  • instructions
• PowerPC instructions
  • added
• process
  • run-time process stack
• program
  • running a
• programs
  • generating interrupt
    • using t (Trap) instruction
    • using ti (Trap Immediate) instruction
    • using tw (Trap Word) instruction
    • using twi (Trap Word Immediate) instruction
• prologs
  • actions
• pseudo-ops (1), (2), (3), (4), (5), (6), (7), (8), (9), (10), (11), (12), (13), (14), (15), (16), (17), (18), (19), (20), (21), (22), (23), (24), (25), (26), (27), (28), (29), (30), (31), (32), (33), (34), (35), (36), (37), (38), (39), (40), (41), (42), (43), (44), (45), (46), (47), (48), (49), (50), (51), (52), (53)
  • addressing
  • calling conventions
    • support for
  • data alignment
  • functional groups
  • miscellaneous
  • support for calling conventions
  • symbol table entries for debuggers

• quad floating-point constant
  • storing at the next fullword location
    • using .quad pseudo-op

• rac (Real Address Compute) instruction
• real address
  • translating effective address to
    • using eciwx (External Control In Word Indexed) instruction
    • using ecowx (External Control Out Word Indexed) instruction
• reciprocal, floating single estimate
• reciprocal, floating square root estimate
• ref pseudo-op
• registers
  • special-purpose
    • changes and field handling
    • extended mnemonics
  • usage and conventions
• reserved words
• rfi (Return from Interrupt) instruction
• rfid (Return from Interrupt Double Word) Instruction (1), (2)
• rfsvc (Return from SVC) instruction
• rldcl (Rotate Left Double Word then Clear Left) Instruction (1), (2)
• rldcr (Rotate Left Double Word then Clear Right) Instruction (1), (2)
• rldic (Rotate Left Double Word Immediate then Clear) Instruction (1), (2)
• rldicl (Rotate Left Double Word Immediate then Clear Left) Instruction (1), (2), (3), (4)
• rldicr (Rotate Left Double Word Immediate then Clear Right) Instruction (1), (2)
• rldimi (Rotate Left Double Word Immediate then Mask Insert) Instruction (1), (2)
• rlimi (Rotate Left Immediate Then Mask Insert) instruction
• rlinm (Rotate Left Immediate Then AND with Mask) instruction
• rlmi (Rotate Left Then Mask Insert) instruction
• rlnm (Rotate Left Then AND with Mask) instruction
• rlwimi (Rotate Left Word Immediate Then Mask Insert) instruction
• rlwinm (Rotate Left Word Immediate Then AND with Mask) instruction
• rlwnm (Rotate Left Word Then AND with Mask) instruction
• rotld extended mnemonic
• rotldi extended mnemonic
• rotlw extended mnemonic
• rotlwi extended mnemonic
• rotrdi extended mnemonic
• rotrwi extended mnemonic
• rrib (Rotate Right and Insert Bit) instruction
• running a program

• sc (System Call) instruction
• scv (System Call Vectored) instruction
• section definition
  • pseudo-ops
• Segment Register
  • copying to general-purpose registers
    • using mfsr (Move from Segment Register) instruction
    • using mfsri (Move from Segment Register Indirect) instruction
    • using mfsrin (Move from Segment Register Indirect) instruction
• selecting operand with fsel instruction
• sf (Subtract from) instruction
• sfe (Subtract from Extended) instruction
• sfi (Subtract from Immediate) instruction
• sfme (Subtract from Minus One Extended) instruction
• sfze (Subtract from Zero Extended) instruction
• si[.] extended mnemonic
• si. (Subtract Immediate and Record) instruction
• si (Subtract Immediate) instruction
• signed integers
  • extending 16-bit to 32 bits
    • using exts (Extend Sign) instruction
    • using extsh (Extend Sign Halfword) instruction
• single-precision floating-point
  • adding 32-bit operand to result of multiplying two operands
    • using fmadds (Floating Multiply-Add Single) instruction (1), (2)
  • adding two 32-bit operands
    • using fadds (Floating Add Single) instruction
  • dividing 32-bit operands
    • using fdivs (Floating Divide Single) instruction
  • multiplying two 32-bit operands
    • using fmuls (Floating Multiply Single) instruction
  • multiplying two 32-bit operands and adding to 32-bit operand
    • using fnmadds (Floating Negative Multiply-Add Single) instruction
  • multiplying two 32-bit operands and subtracting 32-bit operand
    • using fnmsubs (Floating Negative Multiply-Subtract Single) instruction
  • subtracting 32-bit operand from result of multiplying two 32-bit operands
    • using fmsubs (Floating Multiply-Subtract Single) instruction
  • subtracting 32-bit operands
    • using fsubs (Floating Subtract Single) instruction
• sl (Shift Left) instruction
• sld (Shift Left Double Word) Instruction (1), (2)
• sldi extended mnemonic
• sle (Shift Left Extended) instruction
• sleq (Shift Left Extended with MQ) instruction
• sliq (Shift Left Immediate with MQ) instruction
• slliq (Shift Left Long Immediate with MQ) instruction
• sllq (Shift Left Long with MQ) instruction
• slq (Shift Left with MQ) instruction
• slw (Shift Left Word) instruction
• slwi extended mnemonic
• source files
  • identifying file names
    • using .file pseudo-op
• source language type
  • identifying
    • using .source pseudo-op
• source module
  • identifying a symbol defined in another
    • using .extern pseudo-op
• special-purpose registers
  • changes and field handling
  • copying general-purpose register contents into
    • using mtspr (Move to Special-Purpose Register) instruction
  • copying the contents into a general-purpose register
    • using mfspr (Move from Special-Purpose Register) instruction
  • extended mnemonics
• split-field notation
• square root, reciprocal floating estimate
• sr (Shift Right) instruction
• sra (Shift Right Algebraic) instruction
• srad (Shift Right Algebraic Double Word) Instruction (1), (2)
• sradi (Shift Right Algebraic Double Word Immediate) Instruction (1), (2)
• srai (Shift Right Algebraic Immediate) instruction
• sraiq (Shift Right Algebraic Immediate with MQ) instruction
• sraq (Shift Right Algebraic with MQ) instruction
• sraw (Shift Right Algebraic Word) instruction
• srawi (Shift Right Algebraic Word Immediate) instruction
• srd (Shift Right Double Word) Instruction (1), (2)
• srdi extended mnemonic
• sre (Shift Right Extended) instruction
• srea (Shift Right Extended Algebraic) instruction
• sreq (Shift Right Extended with MQ) instruction
• sriq (Shift Right Immediate with MQ) instruction
• srliq (Shift Right Long Immediate with MQ) instruction
• srlq (Shift Right Long with MQ) instruction
• srq (Shift Right with MQ) instruction
• srw (Shift Right Word) instruction
• srwi extended mnemonic
• st (Store) instruction
• stack