NERSCPowering Scientific Discovery Since 1974

Performance on Edison

October 10, 2013
Edison-system.pdf.jpg

Thursday, Oct. 10, 2013

9:00 a.m. to 2:15 p.m. PDT

 

Attendance: 121 (111 online, 10 local)

Location

Online webcast and Oakland Science Facility, 415 20th Street, Oakland, CA

Registration

There is no registration fee, but please register. (Anyone is welcome to register and attend online. The registration page is restricted to NERSC users to prevent form spamming. If you wish to attend, but are not a NERSC user, please send email to training@nersc.gov.) Local attendees will have the option of taking a machine room tour following the event.

Time (PDT)TopicPresenter
9:00 a.m. Edison Phase II Overview Richard Gerber, NERSC
9:30 a.m. The Intel Ivy Bridge processor and Cray Aries interconnect: What you need to know to maximize your code's performance. Nathan Wichmann, Cray Principal Engineer - Performance
11:30 a.m. Building applications on Edison Jack Deslippe, NERSC
12:00 p.m. Working Lunch: Application Performance Measurements Chris Daley, NERSC
1:00 Process and Thread Affinity with OpenMP Zhengji Zhao, NERSC
1:30 Adding OpenMP to Your Code Using Cray Reveal  Helen He, NERSC
  Using the Cray perftools-lite Performance Measurement Tool
2:15 Q&A and adjourn  
2:30 Machine room tour for local attendees  

Downloads