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Intel Compilers, Tools, and Libraries Training, Mar 9-10, 2017

NERSC will host a two-day training event for users about Intel compilers, tools, and libraries from Thursday, March 9 to Friday, March 10. The main presenters will be from Intel.

Topics and Agenda (all time Pacific Standard Time)

Thursday 3/9/2017, Day 1

Time (PDT)TopicPresenter
9:00 am - 9:10 am Inttroduction and Logistics Helen He, NERSC
9:10 am - 9:25 am Intel Developers Products Overview Jeff Rodgers, Intel
9:25 am - 10:30 am Intel Compilers (Composer XE)
Optimization and Vectorization options and reports
Floating Point Model and Accuracy
Control Data alignment - Assist vectorization
OpenMP 4.0 SIMD - Control of Vectorization
Prefetch - software
New in VTune 2018
Ken Craft, Intel
10:30 am - 10:45 am Break  
10:45 am - 12:00 pm Intel Performance and Threading analysis tools
Intel® VTune™ Amplifier XE 2017 U1 and U2
Types of Analysis: Advanced Hotspots, General Explorations, Memory Analysis
New Metric: HPC Performance Snapshots for Hybrid MPI/OMP
Command Line Analysis
Memory optimizations
New in VTune 2018
Thanh Phung, Intel
12:00 pm - 1:00 pm Break (for lunch)  
1:00 pm - 3:00 pm Intel Performance and Threading analysis tools (cont.)
Intel® Inspector XE
Types of Analysis: Memory Checking Analysis Threading Analysis
Advanced Features
Intel Advisor XE
Supported Environments, Installation
Vectorization Advisor
Threading
Locating Potential Threading sites
Simulating Parallelism with Annotations: Modeling scalability, Detecting data races
Evaluating potential parallel models
Munara Tolubaeve, Intel
3:00 pm - 3:15 pm Break  
3:15 pm - 4:30 pm  Introduction to Intel MPI, Cluster tools Mark Lubin (remote), Intel

Friday 3/10/2017, Day 2

Time (PDT)TopicPresenter
9:00 am - 9:20 am Intel Hardware Roadmap Benson Inkley, Intel
9:20 am - 10:45 am Intel Distribution for Python
Migrate to Python
Python on KNL
Introduction of VTune profile for Python Apps
VTune command line instructions
Analyze VTune results
Sergey Maidanov, Intel
10:45 am - 11:00 am Break  
11:00 am - 12:00 pm Library Overview
DAAL – Data Analytics Acceleration Library
             PyDAAL -- Machine learning distributed algorithms
MKL – Math Kernel Libraries
TBB – Intel Threading Building Blocks
Shaojuan Zhu and Jackson Marusaza (remote), Intel
12:00 pm - 1:00 pm Break (for lunch)  
1:00 pm - 2:30 pm  Hands-on Oleksandr Pavlyk, Sergey Maidanov, Intel
2:30 pm - 2:45 pm Break  
2:45 pm - 3:30 pm  Hands-on Oleksandr Pavlyk, Sergey Maidanov, Intel

Registration

Please fill out the short Registration Form to help us with logistics. 

In person and Remote Connection Information

This event will be presented both online using Zoom technology and in person at NERSC/LBNL (visitor info) in Berkeley, CA.  The training will be held at Building 59, Room 3101 (CRT Building, aka Wang Hall).

Remote Connection info:

Join from PC, Mac, Linux, iOS or Android: https://zoom.us/j/5104865180
Or iPhone one-tap (US Toll): +14086380968,5104865180# or +16465588656,5104865180#
Or Telephone: Dial: +1 408 638 0968 (US Toll) or +1 646 558 8656 (US Toll)

Meeting ID: 510 486 5180
International numbers available: https://zoom.us/zoomconference?m=wS-Y_pm6THXqP9aHfkFt27TcgcXD0dve

Presentation Materials

Slides for the training are available here.