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Intel compiler performance optimization and characterization

May 13, 2015

NERSC will host an in-depth training presentation on using the Intel compiler as a performance optimization and characterization tool. The presentation will be May 13th from 10am to 12pm Pacific time. The speaker will be Rakesh Krishnaiyer of Intel.

Abstract

For identified hotspots/analysis done using performance profiling tools (such as VTune), we will discuss how to use the compiler reports to maximize performance and how to guide the compiler optimizer’s code transformations. The talk will include performance best-known-methods and tips, including source code changes in order to improve performance. The talk will also help the user understand optimizations done by the compiler in order to gain performance.

Slides and video

The slides from the event are available here (pdf) while the video is available through the NERSC YouTube channel here.