NERSC Training Events
Also see the NERSC Events Calendar.
BerkeleyGW2017
Schedule and Information https://sites.google.com/site/berkeleygw2017/schedule Description This event is a workshop, with hands-on user sessions, on the GW and GW-BSE approaches using the BerkeleyGW package will be held Jan 4-6 2017, at Lawrence Berkeley National Lab's NERSC Facility. The target audience for the workshop are graduate students, postdocs, and researchers who are interested in learning about or sharpening their skills on ab initio calculations of many-electron effects in… Read More »
2016 NESAP Workshop and Hack-a-Thon
NERSC will be hosting an in person workshop and hack-a-thon for NESAP teams (all tiers) on the Cori Phase 2 system - at the CRT building (Bld 59) on the LBNL campus from November 29 to December 1. The agenda is not yet finalized, but it will be roughly 1/3 presentations and 2/3 hand-on performance analysis and optimization work. The event will take place from 9am to 5pm each day. Presentations will include case-studies from optimization efforts on NESAP codes on the Cori system. The hands-on… Read More »
A 3-day VASP Workshop at NERSC
NERSC will host a three-day workshop for the widely used materials science code, VASP, from Wednesday November 9, 2016 to Friday November 11, 2016 at the CRT building, Room 3101, at the Lawrence Berkeley National Laboratory, Berkeley, CA. The presenter will be Martijn Marsman from University of Vienna, who is one of the main developers of the VASP code. The purpose of this workshop is to help VASP users at NERSC to learn and use VASP more efficiently at NERSC, and also to help them get… Read More »
Cori KNL Training
NERSC will be hosting an in-person and remote training for all users on Cori KNL nodes. Read More »
2016 C++ Summit
2016 LBL C++ Summit is being in organized in collaboration with LBL's computer research division and is being held at NERSC's facility in Berkeley on Monday-Tuesday October 17-18. The two day event will include tutorials and presentations from leaders in the C++ community including standards body members, compiler developers, technology vendors, and developers of C++ extension and programming frameworks like HPX, UPC++, Kokkos and more. Please check out the agenda and register for the event at… Read More »
Paraver and BSC Tools Training - Understanding Application Performance with Paraver
NERSC will host an one-day training event for popular performance analysis tools such as Extrae and Paraver developed at Barcelona Supercomputing Center (BSC), Spain, on Friday August 5. The presenter will be Judit Gimenez of BSC. She is currently the Tools Group Manager at the Computer Science department there. Description BSC has developed a suite of performance analysis tools, named CEPBA-Tools, with a goal to make them easily adaptable to new platforms, environments or programs, scalable,… Read More »
Score-P and Scalasca Performance Tools Training
NERSC will host one day training event for popular performance analysis tools Score-P and Scalasca developed at Juelich Supercomputing Centre, Germany, on Tuesday July 26. The presenters will be Christian Feld of Juelich Supercomputing Centre and David Boehme of Lawrence Livermore National Laboratory. Description This course is intended to give an overview of the VI-HPS programming tools suite explain the functionality of individual tools, in particular Score-P and Scalasca, and how to use them… Read More »
Cori Phase 1 Training: Programming and Optimization
NERSC will host a four-day training event for Cori Phase 1 users on Programming Environment, Debugging and Optimization from Monday June 13 to Thursday June 16. The presenters will be Cray instructor Rick Slick and NERSC staff. Cray XC Series Programming and Optimization Description This course is intended for people who work in applications support or development of Cray XC Series computer systems. It familiarizes students with the hardware and software architecture, Cray’s performance… Read More »
Materials Science Application Training 2016
NERSC will present an one-hour online training class focused on Materials Science applications, VASP and Quantum Espresso on June 10, 2016, Friday, from 10:00-11:00 PDT. This training class will be provided by NERSC staff, Taylor Barnes and Zhengji Zhao. The targeted audience will be new to intermediate NERSC users who use the pre-installed VASP and QE at NERSC. The class will address the frequently asked questions and common problems that users run into when using these applications at… Read More »
Advanced OpenMP Training, February 4, 2016
Speakers: Dr. Michael Klemm, Intel; Dr. Bronis R. de Supinski, LLNL. Location: NERSC/LBNL, CRT Building, Room 59-3101. Berkeley, CA Time: 8:30am - 5:00pm PDT, February 4, 2016. Hosts: Helen He and Alice Koniges Tutorial Description Michael Klemm (an Intel representative in the OpenMP Language Committee) and Bronis R. de Supinski (Chair of the OpenMP Language Committee) will present a one-day tutorial with lectures and hands-on exercises on Advanced OpenMP topics to NERSC users. The… Read More »
IXPUG 2015
NERSC is hosting the 2015 meeting of the Intel Xeon Phi Users Group Sep. 28 through Oct. 1, 2015. The meeting is focused on enabling application performance on the Intel Xeon Phi processor that will power NERSC's upcoming Cori supercomputer. Read More »
Tutorial: Getting Up to Speed on OpenMP 4.0
Watch the Video Speaker: Ruud van der Pas, Oracle. 9:30am - 4:00pm PDT, August 20, 2015 Ruud van der Pas, a Distinguished Engineer in the Architecture and Performance Group, SPARC Microelectronics, Oracle, also a Co-author of the book "Using OpenMP" (published by MIT Press), will present an all day tutorial on OpenMP 4.0 for NERSC users. This is a training event focused on OpenMP only, which is an important component in using hybrid MPI/OpenMP programming model for getting applications… Read More »
New User Training: August 13, 2015
NERSC will present a day of training for new users on August 13, 2015 from 09:00 to 17:00 PDT. This event is targeted to new users of NERSC and will help them navigate the center and its systems. Location This event will be presented online using Zoom technology and in person at NERSC Oakland Scientific Facility. Please see below for remote connection information. Registration There is no registration for the online event. Please see below for remote connection information. If you wish to… Read More »
Intel VTune Training
Experts from Intel will be on site at NERSC next Tuesday, June 23, to provide a hands-on VTune tutorial geared at new and intermediate users to intel tools. Topics Covered: 1. Types of Analysis a. Hotspots Analysis b. Concurrency/Locks and Waits Analysis c. CPU Event Based Analysis 2. Advanced Features 3. Command Line Analysis 4. Remote Data Collection 5. Result Comparison 6. What’s New in the 2016 beta 7. Hands on Time: Tuesday June 23. 9am-3pm PST … Read More »
Materials Science Application Training 2015
NERSC will present an one-hour online training class focused on Materials Science applications, VASP and Quantum Espresso on June 5, 2015, Friday, from 10:00-11:00 PDT. This training class will be provided by NERSC consultants, Jack Deslippe and Zhengji Zhao. The targeted audience will be new to intermediate NERSC users who use the pre-installed VASP and QE at NERSC. The class will address the frequently asked questions and common problems that users run into when using these applications at… Read More »
Allinea DDT and MAP Training 2015
NERSC will host an in-depth training course on Allinea DDT, a graphical parallel debugger, and Allinea MAP, a graphical parallel performance profiler, on Thursday, May 14, 2015. This training class will be provided by an Allinea staff member teamed up with a USG consultant. If you would like your code to be used by the class for debugging or profiling in the hands-on session in the afternoon, please indicate that to us. We will need to determine suitability of the code and prepare the code… Read More »
Intel compiler performance optimization and characterization
NERSC will host an in-depth training presentation on using the Intel compiler as a performance optimization and characterization tool. The presentation will be May 13th from 10am to 12pm Pacific time. The speaker will be Rakesh Krishnaiyer of Intel. Abstract For identified hotspots/analysis done using performance profiling tools (such as VTune), we will discuss how to use the compiler reports to maximize performance and how to guide the compiler optimizer’s code transformations. The talk… Read More »
Key Actions for Optimizing for KNL
"Key Actions When Optimizing for KNL," by Nathan Wichmann of Cray and an update from NERSC Read More »
