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Timeline and Updates

Edison processor information is no longer under NDA

September 11, 2013 | 0 Comments

Ivy Bridge was announced  by Intel on 9/10/2013. There are no more Intel restrictions on making Edison processor information public.   However,  any performance information should not be published without consent from Cray and NERSC until the machine is accpeted.

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All users access the Phase II system

August 27, 2013 | 0 Comments

As of 8/26/2013, all users are enabled on the Phase II system.

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Early users access the Phase II system

August 1, 2013 | 0 Comments

Early users are enabled on the Edison Phase II system.

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Edison batch system is up and running

July 25, 2013 | 0 Comments

Edison batch system is up and running. Cray benchmark team and NERSC staff have started running jobs on the system.

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NERSC staff access the login nodes

July 15, 2013 | 0 Comments

Two of the external login nodes are ready for NERSC staff to access. NERSC staff started testing the programming enviornment and building software and tools for Edison Phase 2.

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