Timeline and Updates
September 11, 2013 | 0 Comments
Ivy Bridge was announced by Intel on 9/10/2013. There are no more Intel restrictions on making Edison processor information public. However, any performance information should not be published without consent from Cray and NERSC until the machine is accpeted.
August 27, 2013 | 0 Comments
As of 8/26/2013, all users are enabled on the Phase II system.
August 1, 2013 | 0 Comments
Early users are enabled on the Edison Phase II system.
July 25, 2013 | 0 Comments
Edison batch system is up and running. Cray benchmark team and NERSC staff have started running jobs on the system.