NERSC's newest supercomputer, named Edison after U.S. inventor and businessman Thomas Alva Edison, will have a peak performance of more than 2 petaflops (PF, or 1015 floating point operations per second) when fully installed in 2013. The integrated storage system will have more than 6 petabytes (PB) of storage with an I/O bandwidth of 140 gigabytes (GB) per second. The product is known as a Cray XC30 (internal name "Cascade"), and the NERSC acquistion project is known as "NERSC-7."
Edison will be installed in two phases; we are currently in phase 1. See the configuration page for more details.
Using a set of benchmarks described below, different optimization options for the different compilers on Edison. The compilers are also compared against one another on the benchmarks. NERSC6 Benchmarks We used these benchmarks from the NERSC6 procurement: NERSC 6 ProCurement MPI Benchmarks Benchmark Science Area Algorithm Concurrency Languages GTC Fusion PIC, finite difference 2048 f90 IMPACT-T Accelerator Physics PIC, FFT 1024 f90 MILC Materials Science Conjugate gradient, sparse matrix, FFT… Read More »