NERSC Hosts 150 HPC Experts as they Prepare for Intel’s Xeon Phi Processor

About 150 members of the high performance computing community spent four days preparing for the next generation of processor architectures at the 2015 IXPUG (Intel Xeon Phi Users Group) meeting at Lawrence Berkeley National Laboratory.

The Sept. 28-Oct. 1 meeting was hosted by the National Energy Research Scientific Computing Center (NERSC), which provides HPC systems and services to support the DOE Office of Science. NERSC’s next supercomputer, named “Cori,” will be a Cray XC system based on the next generation of Intel’s Xeon Phi processor called Knights Landing (KNL). It is expected that most applications currently being used at NERSC will require additional code development to fully take advantage of the computational power of the new “many-core” KNL processor.

Because of the challenges and potential of the Xeon Phi processors, representatives from research institutions that will be deploying systems using the processor formed IXPUG, an independent users group that provides a forum for exchanging ideas and information.

“For a meeting like this, it’s important to get a critical mass of all the right people,” said Richard Gerber, NERSC Senior Science Advisor and User Services group lead, who also serves as president of IXPUG. “In addition to technical talks by Intel staff, we heard lots of real-world tips and techniques from application developers who are already preparing their codes for KNL.”

»See the full agenda of topics and archived presentations.

The meeting was held in Berkeley Lab’s new Computational Research and Theory Facility, where Cori will be installed next year.

NERSC’s KNL system is expected to arrive in mid-2016. Other DOE national laboratories, including Argonne, Los Alamos and Sandia, will also be installing KNL-based systems in the next year or so. The “Stampede” system at the Texas Advanced Supercomputing Center has traditional CPUs accelerated by the current generation of Intel Xeon “Knights Corner” processors.

Gerber said that the HPC community’s interest in the processor is strong, as indicated by the fact that registration was cut off after 150 people had signed up for the meeting.

“I know that KNL is coming and this was a good overview of the hardware, software and programming model issues all at one time,” said Jeanine Cook, a computer scientist in the Scalable Computer Architectures department at Sandia National Laboratories. “One thing that was very useful was having a lot of Intel people there in the same place at the same time so the participants could get their questions answered.”