Sudip Dosanjh
* Contact for appointments: Zaida McCunney | Phone: 510.486.6247 | Email: ZSMcCunney@lbl.gov
Biographical Sketch
Dr. Sudip Dosanjh is Director of the National Energy Research Scientific Computing (NERSC) Center at Lawrence Berkeley National Laboratory. NERSC's mission is to accelerate scientific discovery at the U.S. Department of Energy's Office of Science through high performance computing and extreme data analysis. NERSC deploys leading-edge computational and data resources for over 4,500 users from a broad range of disciplines. NERSC will be partnering with computer companies to develop and deploy pre-exascale and exascale systems during the next decade.
Previously, Dr. Dosanjh headed extreme-scale computing at Sandia National Laboratories. He was co-director of the Los Alamos/Sandia Alliance for Computing at the Extreme-Scale from 2008-2012. He also served on the U.S. Department of Energy's Exascale Initiative Steering Committee for several years.
Dr. Dosanjh had a key role in establishing co-design as a methodology for reaching exascale computing. He has numerous publications on exascale computing, co-design, computer architectures, massively parallel computing and computational science.
He earned his bachelor’s degree in engineering physics in 1982, his master’s degree (1984) and Ph.D. (1986) in mechanical engineering, all from the University of California, Berkeley.
Select Recent Publications
Journal Articles
J. Dongarra et al., “The International Exascale Software Project Roadmap”, International Journal of High Performance Computing Applications, 25:1, 2011,
K. Alvin, B. Barrett, R. Brightwell, S. Dosanjh, A. Geist, S. Hemmert, M. Heroux, D. Kothe, R. Murphy, J. Nichols, R. Oldfield, A. Rodrigues, J. Vetter, “On the Path to Exascale”, International Journal of Distributed Systems and Technologies, 1(2):1– 22, May 22, 2010,
J. Tomkins, R. Brightwell, W. Camp, S. Dosanjh et al., “The Red Storm Architecture and Early Experiences with Multi-Core Processors”, International Journal of Distributed Systems and Technologies, Vol. 1, Issue 2, pp. 74-93, April 19, 2010,
A. Geist, S. Dosanjh, “IESP Exascale Challenge: Co-Design of Architectures and Algorithms”, International Journal of High Performance Computing, Vol. 23, No. 4, pp. 401–402, September 18, 2009,
Conference Papers
R. Barrett, S. Dosanjh, et al., “Towards Codesign in High Performance Computing Systems”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, November 5, 2012,
D. Doerfler, S. Dosanjh, J. Morrison, M. Vigil, “Production Petascale Computing”, Cray Users Group Meeting, Fairbanks, Alaska, 2011,
S. Hu, R. Murphy, S. Dosanjh, K. Olukoton, S. Poole, “Hardware/Software Co- Design for High Performance Computing”, Proceedings of CODES+ISSS’10, October 24, 2010,
A. Rodrigues, S. Dosanjh, S. Hemmert, “Co-Design for High Performance Computing”, Proceedings of the International Conference on Numerical Analysis and Applied Mathematics, Rhodes, Greece, September 18, 2010,
J. Ang, D. Doerfler, S. Dosanjh, K. Koch, J. Morrison, M. Vigil, “The Alliance for Computing at the Extreme Scale”, Proceedings of the Cray Users Group Meeting, Edinburgh, Scotland, May 24, 2010,
Book Chapters
J. Ang, R. Brightwell, S. Dosanjh, et al., “Exascale Computing and the Role of Co-Design”, ( 2011)
John Shalf, S. Dosanjh, John Morrison, “Exascale Computing Technology Challenges”, VECPAR, edited by J.M.L.M. Palma et al. , (Springer-Verlag: 2010) Pages: 1-25
- Download File: ShalfVecpar2010.pdf (pdf: 1.1 MB)
High Performance Computing architectures are expected to change dramatically in the next decade as power and cooling constraints limit increases in microprocessor clock speeds. Consequently computer companies are dramatically increasing on-chip parallelism to improve performance. The traditional doubling of clock speeds every 18-24 months is being replaced by a doubling of cores or other parallelism mechanisms. During the next decade the amount of parallelism on a single microprocessor will rival the number of nodes in early massively parallel supercomputers that were built in the 1980s. Applications and algorithms will need to change and adapt as node architectures evolve. In particular, they will need to manage locality to achieve performance. A key element of the strategy as we move forward is the co-design of applications, architectures and programming environments. There is an unprecedented opportunity for application and algorithm developers to influence the direction of future architectures so that they meet DOE mission needs. This article will describe the technology challenges on the road to exascale, their underlying causes, and their effect on the future of HPC system design.
